nRF54LV10A System-on-Chip

Ultra-low-power, low-voltage wireless SoC for Bluetooth LE

The nRF54L Series offers SoCs that combine an efficient MCU with ultra-low-power wireless connectivity. The nRF54LV10A is a unique SoC in the series with support for 1.2-1.7 V supply for CGMs, miniaturized wearable biosensors, trackers, and other products powered directly from a 1.5V silver oxide battery, including medical and healthcare devices.

nRF54LV10A supports Bluetooth LE, Bluetooth Channel Sounding, and 2.4 GHz proprietary protocols with data rates up to 4 Mbps for low-latency applications.

Performance highlights

  • Processing efficiency and performance: 123 CoreMark/mA @ 1.5 V, 503 CoreMark®
  • Radio power consumption @ 1.5 V: 7.3 mA for RX and 10.1 mA for TX @ 0 dBm
  • Sleep modes current @ 1.5 V: from 1.0 μA to 4.1 μA
  • Maximum TX power: +4 dBm
  • Sensitivity: -97 dBm (1M Bluetooth LE), -101 dBm (802.15.4)


Key benefits

  • Designed for miniaturized devices powered by a silver oxide coin-cell
  • Reduced design complexity, size, and cost
  • Reliable and robust wireless connectivity
  • Built-in security features for compliance with regulations
  • Enables devices powered by smaller batteries
  • Years of shelf-life enabled with the hibernation mode
  • nRF Cloud support for device management, FOTA and more


The nRF54L Series

Key Features
  • 128 MHz Arm® Cortex®-M33
  • 1 MB NVM and 192 KB RAM
  • Ultra-low-power multiprotocol 2.4 GHz radio
  • 1.2 to 1.7 V supply and GPIO voltage
  • <50 nA hibernation mode for shipping and storage
  • 3x SPI/TWI/UART
  • ADC
  • Global RTC available in System OFF
  • 128 MHz RISC-V coprocessor
  • TrustZone® isolation, tamper detection, and
    cryptographic engine with side-channel leakage protection
  • Package options: CSP29 (1.9x2.3mm), QFN48
Documentation
Datasheet

Reference layout

CSP package

Selected version
0.7

Changelog:

0.7

  • Update matching network components to optimize RF performance
    • C8 updated to 1.2 pF
    • L4 updated to 3.3 nH
  • Improve grounding for DECRF decoupling capacitor
    • Moved routing of GPIO pins(D4, C4, B4, B3 and C2) from Mid-layer 1 to Mid-layer 2

0.6

  • The first published version

Reference layout

QFN package

Selected version
0.3

Changelog:

0.3

  • The first published version