Nordic Semiconductor nRF5 AirFuel SDK  version 2.2.0
nrf_drv_config.h
1 /* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
2  *
3  * The information contained herein is property of Nordic Semiconductor ASA.
4  * Terms and conditions of usage are described in detail in NORDIC
5  * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
6  *
7  * Licensees are granted free, non-transferable use of the information. NO
8  * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
9  * the file.
10  *
11  */
12 
20 #ifndef NRF_DRV_CONFIG_H
21 #define NRF_DRV_CONFIG_H
22 
23 /* CLOCK */
24 #define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_16MHz
25 #define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LF_SRC_Xtal
26 #define CLOCK_CONFIG_LF_RC_CAL_INTERVAL RC_2000MS_CALIBRATION_INTERVAL
27 #define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
28 
29 /* GPIOTE */
30 #define GPIOTE_ENABLED 1
31 
32 #if (GPIOTE_ENABLED == 1)
33 #define GPIOTE_CONFIG_USE_SWI_EGU false
34 #define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
35 #define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
36 #endif
37 
38 /* TIMER */
39 #define TIMER0_ENABLED 0
40 
41 #if (TIMER0_ENABLED == 1)
42 #define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
43 #define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
44 #define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
45 #define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
46 
47 #define TIMER0_INSTANCE_INDEX 0
48 #endif
49 
50 #define TIMER1_ENABLED 0
51 
52 #if (TIMER1_ENABLED == 1)
53 #define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
54 #define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
55 #define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
56 #define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
57 
58 #define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
59 #endif
60 
61 #define TIMER2_ENABLED 0
62 
63 #if (TIMER2_ENABLED == 1)
64 #define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
65 #define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
66 #define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
67 #define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
68 
69 #define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
70 #endif
71 
72 #define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED)
73 
74 /* RTC */
75 #define RTC0_ENABLED 0
76 
77 #if (RTC0_ENABLED == 1)
78 #define RTC0_CONFIG_FREQUENCY 32678
79 #define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
80 #define RTC0_CONFIG_RELIABLE false
81 
82 #define RTC0_INSTANCE_INDEX 0
83 #endif
84 
85 #define RTC1_ENABLED 0
86 
87 #if (RTC1_ENABLED == 1)
88 #define RTC1_CONFIG_FREQUENCY 32768
89 #define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
90 #define RTC1_CONFIG_RELIABLE false
91 
92 #define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
93 #endif
94 
95 #define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED)
96 
97 #define NRF_MAXIMUM_LATENCY_US 2000
98 
99 /* RNG */
100 #define RNG_ENABLED 0
101 
102 #if (RNG_ENABLED == 1)
103 #define RNG_CONFIG_ERROR_CORRECTION true
104 #define RNG_CONFIG_POOL_SIZE 8
105 #define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
106 #endif
107 
108 /* TWI */
109 #define TWI0_ENABLED 0
110 
111 #if (TWI0_ENABLED == 1)
112 #define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
113 #define TWI0_CONFIG_SCL 0
114 #define TWI0_CONFIG_SDA 1
115 #define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
116 
117 #define TWI0_INSTANCE_INDEX 0
118 #endif
119 
120 #define TWI1_ENABLED 1
121 
122 #if (TWI1_ENABLED == 1)
123 #define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_250K
124 #define TWI1_CONFIG_SCL 0
125 #define TWI1_CONFIG_SDA 1
126 #define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
127 
128 #define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
129 #endif
130 
131 #define TWI_COUNT (TWI0_ENABLED+TWI1_ENABLED)
132 
133 /* QDEC */
134 #define QDEC_ENABLED 0
135 
136 #if (QDEC_ENABLED == 1)
137 #define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
138 #define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
139 #define QDEC_CONFIG_PIO_A 1
140 #define QDEC_CONFIG_PIO_B 2
141 #define QDEC_CONFIG_PIO_LED 3
142 #define QDEC_CONFIG_LEDPRE 511
143 #define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
144 #define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
145 #define QDEC_CONFIG_DBFEN false
146 #define QDEC_CONFIG_SAMPLE_INTEN false
147 #endif
148 
149 /* LPCOMP */
150 #define LPCOMP_ENABLED 0
151 
152 #if (LPCOMP_ENABLED == 1)
153 #define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_FOUR_EIGHT
154 #define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
155 #define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
156 #define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
157 #endif
158 
159 /* WDT */
160 #define WDT_ENABLED 0
161 
162 #if (WDT_ENABLED == 1)
163 #define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
164 #define WDT_CONFIG_RELOAD_VALUE 2000
165 #define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
166 #endif
167 
168 #endif // NRF_DRV_CONFIG_H
169